💻 Writing a 4-bit Adder in Verilog
1. Introduction
A 4-bit adder is a digital circuit that adds two 4-bit binary numbers and produces a 4-bit sum and a carry-out.
This circuit is commonly used in arithmetic logic units (ALUs), counters, and digital processors.
In Verilog, we can design this circuit easily by describing how each bit of the two numbers is added together.
2. Concept of a 4-bit Adder
Each bit addition follows the basic binary addition rule:
A B Cin Sum Cout
0 0 0 0 0
0 1 0 1 0
1 0 0 1 0
1 1 0 0 1
0 0 1 1 0
1 1 1 1 1
To add 4 bits, we can:
Use four full adders, each handling one bit.
Connect the carry-out of one adder to the carry-in of the next.
3. Verilog Code for a 4-bit Adder
Method 1: Simple Behavioral Design
// 4-bit Adder - Behavioral Model
module four_bit_adder (
input [3:0] A, // 4-bit input A
input [3:0] B, // 4-bit input B
input Cin, // Carry input
output [3:0] Sum, // 4-bit Sum output
output Cout // Carry output
);
assign {Cout, Sum} = A + B + Cin;
endmodule
4. Explanation of the Code
Line Description
module four_bit_adder (...); Declares the module with inputs and outputs.
[3:0] Declares a 4-bit vector (bit 3 is MSB, bit 0 is LSB).
assign {Cout, Sum} = A + B + Cin; Performs binary addition. The {} combines carry and sum into one 5-bit result.
endmodule Marks the end of the module.
This version is short and uses Verilog’s built-in arithmetic operations.
5. Writing a Testbench
To test your 4-bit adder, you can write a testbench (a simulation program):
// Testbench for 4-bit Adder
module test_four_bit_adder;
reg [3:0] A;
reg [3:0] B;
reg Cin;
wire [3:0] Sum;
wire Cout;
// Instantiate the 4-bit adder
four_bit_adder uut (
.A(A),
.B(B),
.Cin(Cin),
.Sum(Sum),
.Cout(Cout)
);
initial begin
// Display header
$display("A\tB\tCin\t|\tSum\tCout");
$display("--------------------------------");
// Apply test values
A = 4'b0001; B = 4'b0010; Cin = 0; #10;
$display("%b\t%b\t%b\t|\t%b\t%b", A, B, Cin, Sum, Cout);
A = 4'b0101; B = 4'b0110; Cin = 0; #10;
$display("%b\t%b\t%b\t|\t%b\t%b", A, B, Cin, Sum, Cout);
A = 4'b1111; B = 4'b0001; Cin = 0; #10;
$display("%b\t%b\t%b\t|\t%b\t%b", A, B, Cin, Sum, Cout);
A = 4'b1111; B = 4'b1111; Cin = 1; #10;
$display("%b\t%b\t%b\t|\t%b\t%b", A, B, Cin, Sum, Cout);
$finish;
end
endmodule
6. Simulation Output (Example)
When simulated, you’ll see something like:
A B Cin | Sum Cout
--------------------------------
0001 0010 0 | 0011 0
0101 0110 0 | 1011 0
1111 0001 0 | 0000 1
1111 1111 1 | 1111 1
7. Summary
A 4-bit adder adds two 4-bit numbers and one carry input.
Verilog allows you to model this behavior easily using the assign statement.
You can verify the design using a testbench and a Verilog simulator (like ModelSim or Icarus Verilog).
8. Next Steps
You can now:
Modify this design to make an 8-bit or 16-bit adder.
Combine multiple adders to create an Arithmetic Logic Unit (ALU).
Learn about Ripple Carry Adders and Carry Look-Ahead Adders for speed optimization.
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💻 HDL Programming (Verilog/VHDL)
Glitches in Digital Circuits: Causes and Fixes
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